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Electrical and Thermal Performance of SiC Wide-Bandgap Power Devices: Influence of Package Configuration

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Electrical and Thermal Performance of SiC Wide-Bandgap Power Devices: Influence of Package Configuration

Author Information
1
Onsemi, Bucheon-si 14487, Gyeonggi-do, Republic of Korea
2
Onsemi, East Fishkill, NY 12533, USA
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Authors to whom correspondence should be addressed.

Received: 23 January 2026 Revised: 19 March 2026 Accepted: 08 April 2026 Published: 17 April 2026

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© 2026 The authors. This is an open access article under the Creative Commons Attribution 4.0 International License (https://creativecommons.org/licenses/by/4.0/).

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Intell. Sustain. Manuf. 2026, 3(1), 10008; DOI: 10.70322/ism.2026.10008
ABSTRACT: Wide Bandgap (WBG) semiconductors, particularly Silicon Carbide (SiC), have become pivotal in advancing high-efficiency, high-power-density systems. Cascode configurations, combining a high-voltage SiC JFET with a low-voltage Si MOSFET, enable Normally-OFF operation while leveraging SiC’s superior switching and thermal properties. However, co-packaging these devices introduces critical design challenges related to parasitic inductance, thermal management, and reliability. This study investigates the impact of bonding configuration and die-attach material selection on dynamic and thermal performance in SiC-based modules. Double Pulse Test (DPT) results reveal that direct bonding provides a better tradeoff between switching losses and dynamic operation stability, mitigating VDS overshoot, gate oscillation, and EMI risk, thereby improving switching stability under system-level stress. Conversely, indirect bonding increases inductance, amplifying oscillations and dynamic stress during turn-off events. Thermal analysis demonstrates that while system-level cooling dominates Rthja, the adoption of sintered silver (Ag) as a die-attach material achieves ~20% reduction in Rthjc, lowering junction temperatures and enhancing reliability for high-power applications. These findings underscore the importance of interconnect design and attach material optimization in achieving robust, high-efficiency operation of wide-bandgap devices.
Keywords: SiC; JFET; Cascode; Double Pulse Test (DPT); Bonding topology; Interconnect; Die attach; Pressure-less sintered silver; RthJC; Thermal resistance; Wide‑bandgap (WBG) devices; Power modules
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